AMD outlined a new ambidextrous approach and architecture during its Core Innovation Update press conference in San Francisco today, revealing a number of announcements centering on this multi-handed approached.
The company is stressing an ARM and x86 future, one where the two processor architectures dominate the server space. To this end, AMD announced it's now an ARM architectural licensee and is developing its own ARM cores.
"We set out a couple of years ago to ensure that as we continue to evolve our core markets, we also build the bridge to the future," Lisa Su, senior vice president and general manager at Global Business Units. "And the bridge to the future is offering both ARM and x86 in our portfolio."
To the clouds
The chipmaker outlined the new Project SkyBridge ambidextrous design framework, a family of 20nm APUs and SoC destined for 2015. SkyBridge will mark the first time 64-bit ARM and x86 compute are pin compatible, Su said.
x86 SkyBridge products will utilize the "Puma+" cores first announced in Beema and Mullins, and are designed for full Heterogenous System Architecture (HSA) support. Graphics Core Next will find a home in the family as well. On the ARM end, low-power A57 64-bit ARM Cores will make the SkyBridge leap, and they'll mark AMD's first HSA Android platform.
Project SkyBridge products are intended for imbedded and client markets, Su said.
"It's an opportunity for us to help customers innovate, differentiate and also reduce their time to market," she concluded.
Going to Seattle and beyond
As for this year, AMD is hanging its hat on Seattle, its first 64-bit ARM processor.
"We chose [a 64-bit ARM chip] because we believe there is a fundamental disruption in the server market over the next few years," Su said.
Seattle was treated to its first public demonstration during the press conference. Already announced and shipping, the 28nm 64-bit ARM server processor zipped through a web hosting demo onstage, easily handling a WordPress blog and serving video within a matter of seconds.
Seattle can pack with up to 8 ARM Cortex A57 cores and up to 4MB shared L2 and 8MB L3 cache, Su outlined. On the memory side, the city-named CPU can store up to 128GB per core and features dual channel DDR3/4 with ECC up to 1866MHz. Finally, Seattle is ARM Server Base System Architecture specification compliant.
AMD wants to enjoy the same leadership it has in consoles in the data center, and Seattle is its first big play for the space.
As the company moves into 2016 and beyond, its overarching strategy - an ambidextrous one, mind you - centers on developing 64-bit ARM cores in conjunction with new 64-bit x86 cores. Vague, but we're sure AMD will have more to share in the coming months.
from Techradar - All the latest technology news http://ift.tt/1kPSl1j
沒有留言:
張貼留言